(a) Field of the Invention
The present invention relates to technologies for manufacturing wiring boards used as packages for mounting semiconductor elements thereon (hereinafter referred to as xe2x80x9csemiconductor packagesxe2x80x9d). More specifically, the present invention relates to a semiconductor package using a metal as a core member of a printed board, a method of manufacturing the semiconductor package, and a semiconductor device. As a matter of convenience, the metal used as the core member of the semiconductor package will be hereinafter referred to as a xe2x80x9cmetal corexe2x80x9d.
(b) Description of the Related Art
Conventionally, a so-called copper-clad laminate is used as a core portion of a typical printed board (a semiconductor package). The copper-clad laminate includes a core formed by stacking a required number of glass-fabric sheets impregnated with insulative resin (such as epoxy resin, polyimide resin, BT resin, PPE resin or the like), and a copper foil(s) attached to one or both surfaces thereof, in which the foregoing members are laminated by applying heat and pressure.
In the prior art, upon manufacturing a semiconductor package using such a copper-clad laminate, a core substrate thereof has been manufactured in accordance with the manufacturing steps as exemplified in FIG. 1A to FIG. 1D. Specifically, the core substrate of the package has been manufactured by: preparing a copper-clad laminate 3 by attaching copper foils 2 on both surfaces of an insulative core member 1 (FIG. 1A); forming through holes 4 in required positions of the copper-clad laminate 3 (FIG. 1B); forming a copper (Cu) thin film 5 on the entire surface of the copper-clad substrate 3 inclusive of inner surfaces of the through holes 4 (FIG. 1C); and filling the insides of the through holes 4 with a conductive material 6 (Cu) (FIG. 1D).
Although a process subsequent thereto is not particularly illustrated throughout FIG. 1A to FIG. 1D, a typical process to be carried out includes the steps of planarizing both surfaces of the core substrate, forming a wiring layer (inclusive of pads) by forming a Cu layer on the entire surface of the core substrate and then patterning the Cu layer into appropriate patterns by photolithography, forming a resin layer (an insulating layer) on the entire surface including the wiring layer, forming a via hole in a required position on the resin layer such that the via hole reaches a pad on a lower layer in the corresponding position, repeating formation of the wiring layers, the resin layers and the via holes until constituting a required number of layers and thereby forming a wiring layer (inclusive of pads) on the outermost layer ultimately, forming a protective film on the entire surface and forming openings in the protective film in positions corresponding to pads on a lower layer, bonding external connection terminals (such as pins or solder balls) to pads exposed from the openings, and the like.
According to the prior art process, the core substrate of the semiconductor package is manufactured by the steps such as described in FIG. 1A to FIG. 1D, in which the glass fabrics impregnated with the insulative resin are used for the copper-clad laminate 3 as the core. Therefore, a mechanical drill or a laser (a CO2 laser, an excimer laser, or the like) needs to be used for drilling the through holes 4.
On the other hand, semiconductor packages in recent years have been required to realize high density; therefore, wiring patterns therein are made close to each other. As a result, the semiconductor packages tend to incur problems such as occurrence of crosstalk noises between the wiring patterns or fluctuation of an electric potential of a power supply line or the like. In particular, a package for mounting a high-frequency semiconductor element, which has to effectuate a high-speed switching operation, tends to incur crosstalk noises according as the frequency increases. Moreover, switching noises are incurred by a switching element being turned on and off rapidly, whereby the electric potential of the power supply line or the like tends to fluctuate.
Conventionally, as a remedy for the foregoing problem, capacitor elements such as chip capacitors have been annexed to a package mounting a semiconductor element, whereby a signal line or a power supply line thereof has been xe2x80x9cdecoupledxe2x80x9d.
In this case, however, the degree of freedom of design of wiring patterns may be restricted because of provision of the chip capacitors, or an increase in inductance may be incurred because a line distance of the wiring pattern for connecting between the chip capacitor and a power-source/ground terminal of the semiconductor element is lengthened. A decoupling effect by the chip capacitor is degraded where the inductance is large. Therefore, it is preferred that the inductance is made as small as possible. In other words, it is preferred that the capacitor element such as the chip capacitor is disposed as close to the semiconductor element as possible.
Moreover, since the capacitor elements such as the chip capacitors are annexed to the package, the package may become larger as a whole or heavier. Such an increase in size or weight goes against the recent trend for downsizing and weight saving of semiconductor packages.
Instead of annexing the capacitor elements such as the chip capacitors to the package, one conceivable remedy for dealing with such inconvenience is to provide equivalent capacitor elements (capacitor portions) inside the package.
Conventionally, as technology for providing the capacitor portions inside the packages, there have been taken approaches such as laminating a sheet member as a dielectric layer of the capacitor portions between wiring layers, with inorganic filler mixed thereinto for increasing dielectric constant.
As described above, according to the conventional process of manufacturing the semiconductor package, the copper-clad laminate is used as its core portion and the through holes are drilled in the copper-clad laminate by a processing apparatus using a mechanical drill or the like. Therefore, the drilling process depends on processing performance of the processing apparatus, and reduction in hole sizes (diameters) of the through holes are technically limited. Accordingly, there has been a problem in that a through hole pitch (a distance between centers of two adjacent through holes) cannot be always narrowed enough to satisfy a required pitch.
Incidentally, in the case of using a mechanical drill, for example, the smallest diameter of the through hole available in the state of the art is limited to a range from about 300 xcexcm to 200 xcexcm. In the example shown in FIG. 1A to FIG. 1D, the diameter of each through hole 4 is 200 xcexcm. In this event, the through hole pitch is set to 400 xcexcm. Also, the thickness of the copper-clad laminate 3 is 250 xcexcm.
Where the through hole pitch cannot be narrowed to a required degree, a high densification of wirings in a semiconductor package will be inhibited. Eventually, it becomes difficult to achieve micro fabrication of wirings.
It is predicted that higher densification of wirings (micro fabrication of wirings) in semiconductor packages will be further demanded. Under these circumstances, technology for further narrowing the through hole pitch is therefore required. However, as described above, it has not been always possible to meet the demands currently because of dependency on processing performance of the processing apparatus.
Moreover, there have been disadvantages in that the use of the copper-clad laminate increases material costs and that requirement of the step of drilling the through holes on the copper-clad laminate using the mechanical drill or the like increases equipment costs (and eventually manufacturing costs).
On the other hand, where the capacitor elements (the capacitor portions) for exerting the decoupling effect are provided inside the package, in the prior art, the sheet member made of a high-dielectric material is laminated between the wiring layers as the dielectric layer of the capacitor portions. Accordingly, a film thickness of an insulating film between the wiring layers needs to be thickened more than the thickness of the dielectric layer, and accordingly there has been a disadvantage in that the interlayer insulating layer cannot be sufficiently thinned. Such a disadvantage inhibits realization of a low-profile semiconductor package, and a thick interlayer insulating layer goes against the need of the age, which is to provide a high-packaging-density semiconductor device while thinning the thickness of the entire package. In addition, costs for the interlayer insulating layer are increased more as the film thickness grows more. Eventually, there has been a problem of an increase in costs for manufacturing the package.
An object of the present invention is to provide a semiconductor package, a method of manufacturing the semiconductor package and a semiconductor device, which are capable of manufacturing a core substrate without performing through hole drilling using a mechanical drill or the like, thereby realizing a high-density micro fabrication of wiring and contributing to a reduction in fabrication costs.
Another object of the present invention is to provide a semiconductor package, a method of manufacturing the semiconductor package and a semiconductor device, which are capable of inner-packing capacitor portions for exerting a decoupling effect without inhibiting realization of a low-profile package or increasing fabrication costs.
To attain the foregoing objects, according to one aspect of the present invention, there is provided a method of manufacturing a semiconductor package using a plate-like metal core as a core member, the method comprising the step of manufacturing a core substrate using the metal core, the step of manufacturing a core substrate including the steps of forming a through hole in a required position on the metal core using one of an etching and a punching, forming a resin film on a surface of the metal core inclusive of an inner wall of the through hole by coating insulative resin using an electrophoretic deposition process, forming a conductive thin film on an entire surface of the resin film, and filling an inside of the through hole with one of a conductive material and an insulative material.
According to the method of manufacturing a semiconductor package of the present invention, in the process of manufacturing the core substrate, the through hole is drilled in the metal core using the etching or the like, and the insulative resin film is formed on the metal core after drilling using the electrophoretic deposition process. Therefore, it is possible to reduce a diameter of the through hole as compared to the conventional through hole processing on a copper-clad laminate using a mechanical drill or the like. Accordingly, it is possible to reduce a though hole pitch considerably narrower. In this way, formation of high-density micro wiring becomes feasible, and reduction in manufacturing costs can be also realized.
Also, according to another aspect of the present invention, there is provided a method of manufacturing a semiconductor package, which includes, subsequently to the step of manufacturing the core substrate, the steps of planarizing both surfaces of the core substrate until the surface of the resin film is exposed, forming via holes to reach the metal core in required positions on the resin film, forming conductive layers on both surfaces of the substrate while filling insides of the via holes and then patterning the conductive layers into required patterns to thereby form first wiring layers inclusive of pads, forming insulating layers on both surfaces of the substrate inclusive of the first wiring layers, forming via holes to reach the pads of the first wiring layers in required positions on the insulating layers, forming second wiring layers inclusive of patterned pads ultimately on outermost surfaces of the substrate by forming patterned wiring layers, insulating layers and via holes sequentially until reaching a required number of layers, forming protective films on both surfaces of the substrate inclusive of the second wiring layers and forming opening in the respective protective films in positions corresponding to the pads of the second wiring layers, and bonding external connection terminals to the pads exposed from the openings formed on one of the protective films.
According to the method of manufacturing a semiconductor package in accordance with this aspect, it is possible to constitute a capacitor portion by utilizing the resin film as a dielectric layer and by utilizing the metal core (an external connection terminal to be electrically connected via the respective via holes and the first and second wiring layers) and the first wiring layer on the resin film (an external connection terminal to be electrically connected via the via holes and the second wiring layer), as electrodes, respectively.
Therefore, such presence of the capacitor portion can exert a required decoupling effect (suppression of occurrence of crosstalk noises between the wirings, fluctuation in electric potential of a power supply line, or the like). Moreover, since parts of the members constituting the package (namely, the metal core, the resin films and the wiring layers) are also used as the dielectric layers and the respective electrodes of the capacitor portions, it is not necessary to incorporate a sheet member as a capacitor portion into the package as in the prior art. This contributes to a realization of a low-profile semiconductor package and to a reduction in fabrication costs thereof.
Moreover, according to another aspect of the present invention, there is provided a semiconductor package manufactured in accordance with the above-described method of manufacturing a semiconductor package.
Furthermore, according to still another aspect of the present invention, there is provided a semiconductor device, in which a semiconductor element is mounted on an opposite surface to the surface of the semiconductor package where the external connection terminals are bonded, electrode terminals of the semiconductor element being electrically connected to pads exposed from the openings formed in the protective film.